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div7.net
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1993-11-09
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1KB
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33 lines
!Documentation
(c) Copyright 1992 Genashor Corp. All rights reserved.
After performing simulations using nominal delays, you know that
actual delays in silicon will differ. SIMIC has unique hazard
analysis capabilities that inform you if minor delay variations will
cause the circuit to malfunction.
This circuit is a divide by seven counter made up of T flip flops.
Using the SIMIC run commands in the file 'div7.run', you will see
how circuit troubleshooting is performed in SIMIC. Though this
debugging session will be done in batch mode, SIMIC allows any
command to be entered interactively. This allows each step of the
circuit debugging to be chosen based on the results of the previous
information.
Though this circuit has fixed delays, SIMIC allows delays to be
modified with loading conditions.
!Logical
!Format Part= Type= I= Orise= Ofall=
Type=divide_by_7 I=clock,reset O=q4
q1 tncf reset,skip_2,clock
q2 tncf reset,one,cl2
q4 tncf reset,one,cl4
skip_2 nand nq4,nq1_q2 1 1
nq1_q2 nor nq2,q1 3 3
nq2 inv q2 2 2
nq4 inv q4 6 3
cl2 and q1,clock
cl4 and q1,q2,clock